David Ge's Location
San Jose, CA, US
David Ge's Work
- Director Of Design Engineering @ Cadence Design Systems
- Sr. Engineering Manager, IPG @ Cadence Design Systems
- CAD Manager @ Ralink Technology
- Physical Design and Verification Consultant @ Netronome
- Physical design and verification consultant @ Aquantia
- Physical verification consultant @ Optichron Inc.
- Staff Design Engineer @ Cadence Design Systems
- Principle Design Engineer @ Simplex Solution Inc
- Sr. Design Engineer @ Cirrus Logic
David Ge's Education
- Oregon State University
MSEE (Electrical Engineering)
1991 - 1993 - Oregon State University
BSEE (Electrical Engineering)
1987 - 1991
David Ge's Skills
- ASIC
- SoC
- ARM
- Cadence
- Physical Verification
- Low-power Design
- EDA
- Static Timing Analysis
- VLSI
- Mixed Signal
David Ge's Summary
David Ge, based in San Jose, CA, US, is currently a Director Of Design Engineering at Cadence Design Systems, bringing experience from previous roles at Cadence Design Systems, Ralink Technology, Netronome Systems and Aquantia Corp. David Ge holds a 1991 - 1993 MSEE in Electrical Engineering @ Oregon State University. With a robust skill set that includes ASIC, SoC, ARM, Cadence, Physical Verification and more, David Ge contributes valuable insights to the industry. David Ge has 3 emails on RocketReach.
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