David Garner Email & Phone Number
Head of IC Development @ DNA Electronics (DNAe)
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David Garner Location
- London, GB
David Garner Work
- Head of IC Development @ (April 2021 - Present)
- Director of Electronic Engineering @ (April 2020 - March 2021)
- Head of IC Development @ (February 2014 - March 2020)
- Principal Staff IC Design Engineer @ (July 2013 - January 2014)
- Head of IC Design @ (June 2008 - June 2013)
- Head of IC Design @ CamSemi (October 2001 - May 2008)
- Process development engineer @ (October 2000 - September 2001)
David Garner Education
- University of Cambridge
PhD degree (Electrical Engineering)
- University of Cambridge
BA Honours degree (Electrical and Information Sciences)
- Harrogate Rossett High School
'A' level (A grades in Mathematics; Physics, Chemistry, Further Mathematics, and General Studies)
David Garner Skills
- Semiconductors
- IC
- ASIC
- Integrated Circuit Design
- Mixed Signal
- Power Management
- Power Electronics
- Analog
- Product Engineering
- Analog Circuit Design
- Electronics
- RF
- CMOS
- Circuit Design
- Microelectronics
- Hardware Architecture
- Digital Signal Processors
- Integrated Circuits (IC)
- Product Development
- Sensors
- Application-Specific Integrated Circuits (ASIC)
- Engineering
- PCB design
- R&D
- Analog Circuits
- Analog Signal Processing
- Digital Signal Processing
- Cadence
- Cadence Virtuoso
- Cadence Virtuoso Layout Editor
- Cadence Spectre
- Cadence Analog Artist
- Cadence Schematic Capture
- Analog Integrated Circuit Design
- Analog Layout
- Music Production
- Music Composition
- Making Music
- Cubase
- Piano Playing
- Organ
- Music Industry
- Rock Music
- Contemporary Music
- Music Performance
- Orchestral Music
- Music Theory
- Original Music
- Music Management
- Music
- Analog-to-Digital Converters (ADC)
- Cadence AMS Designer
- Cadence PVS / Pegasus
- DAC
- Digital Circuit Design
- EDA
- Engineering Leadership
- Engineering Management
- Executive Team
- FPGA prototyping
- Field-Programmable Gate Arrays (FPGA)
- High-speed Digital Design
- Instruction Set Architecture
- LabVIEW
- PDK Development
- Phase-Locked Loop (PLL)
- Place & Route
- Semiconductor Fabrication
- SerDes
- Signal Processing
- Space Systems
- Verilog
- Verilog-AMS
- Very-Large-Scale Integration (VLSI)
- Wireline
- Wreal modelling
- cadence xcelium
- Integrated Circuits Ic
- Application Specific Integrated Circuits Asic
- Electronic Engineering
- Integrated Circuits
- Application Specific Integrated Circuits
David Garner Summary
- David Garner, based in London, GB, is currently a Head of IC Development at DNA Electronics (DNAe). David Garner brings experience from previous roles at Universal Quantum, DNA Electronics, Peregrine Semiconductor and DNA Electronics (DNAe). David Garner holds a PhD degree in Electrical Engineering @ University of Cambridge. With a robust skill set that includes Semiconductors, IC, ASIC, Integrated Circuit Design, Mixed Signal and more. David Garner has 2 emails and 1 mobile phone numbers on RocketReach.
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