Staff SoC Design Engineer @ (April 2017 - January 2020)
Sr SoC Design Engineer @ (June 2014 - April 2017)
Sr. Component Design Engineer @ (February 2010 - June 2014)
Sr. Component Design Engineer @ (July 2008 - February 2010)
Component Design Engineer @ (July 2000 - July 2008)
Associate Clean Room Engineer @ (August 1999 - July 2000)
David Daigle Education
University of Massachusetts Lowell
Master of Science (MS) (Computer Engineering)
University of Massachusetts Lowell
Bachelor of Science (BS) (Electrical Engineering)
David Daigle Skills
ASIC
Application-Specific Integrated Circuits (ASIC)
Assertion Based Verification
Debugging
Functional Coverage
Functional Verification
Gate Level Simulation
Linux
Logic Design
Logic Synthesis
Low-power Design
Microprocessors
RTL Design
RTL Development
RTL coding
RTL verification
Release Management
Scripting
Semiconductors
SoC
Synopsys tools
System on a Chip (SoC)
SystemVerilog
UPF
Unix
VLSI
Verification
Verilog
System On A Chip Soc
Intel
IP
Assertion Based
Application Specific Integrated Circuits Asic
Design
Low Power Design
Component Design
Chipset
System on a Chip
Application Specific Integrated Circuits
David Daigle Summary
David Daigle, based in Marlborough, MA, US, is currently a Soc Integ Verification Manager at Intel Corporation. David Daigle brings experience from previous roles at Intel Corporation. David Daigle holds a Master of Science (MS) in Computer Engineering @ University of Massachusetts Lowell. With a robust skill set that includes ASIC, Application-Specific Integrated Circuits (ASIC), Assertion Based Verification, Debugging, Functional Coverage and more. David Daigle has 3 emails and 1 mobile phone numbers on RocketReach.
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