Darshil Shah Email & Phone Number
Senior Staff Soc Design Engineer @ Intel Corporation
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Darshil Shah Location
- San Diego, CA, US
Darshil Shah Work
- 2022 -now Senior Staff Soc Design Engineer @
- 2017 -2022 Senior Principal Application Engineer @
- 2014 -2017 Lead Application Engineer @
- 2011 -2012 Asic Development Design Engineer @
- 2008 -2010 Grading Assistant @
- 2010 -2010 Research and Development Intern @
- 2009 -2010 Research Assistant @
- 2007 -2008 Project Engineer @ Maharshi Electronic Systems
- 2007 -2007 Internship Trainee @
Darshil Shah Education
- Santa Clara University
Master Of Science (Electrical Engineering)
2008-2010 - Nirma University Of Science And Technology 2007
- NIRMA University
Bachelors (Communication, Electronics)
2003-2007 - Pulkit Secondary And Higher Secondary School 1995
Darshil Shah Skills
- Root Cause Analysis
- Engineering
- Written Communication
- Problem Solving
- Presentations
- Communication
- Cadence Software
- Benchmarking
- Verilog
- VHDL
- Physical Design and Verification
- Static Timing Analysis
- SPICE
- C
- Integrated Circuit Design
- FPGA
- TCL
- System Verilog
- Xilinx
- SystemVerilog
- Embedded Systems
- ModelSim
- VLSI
- ASIC
- Debugging
- Perl
- Technology
- Ic Design
- Altera
- Semiconductors
- Design
- Architecture
- IC
Darshil Shah Summary
- Darshil Shah, based in San Diego, CA, US, is currently a Senior Staff Soc Design Engineer at Intel Corporation. Darshil Shah brings experience from previous roles at Cadence Design Systems, Lsi, an Avago Technologies Company and Santa Clara University. Darshil Shah holds a 2008 - 2010 Master Of Science in Electrical Engineering @ Santa Clara University. With a robust skill set that includes Root Cause Analysis, Engineering, Written Communication, Problem Solving, Presentations and more. Darshil Shah has 3 emails and 1 mobile phone numbers on RocketReach.
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