Darshan Divecha Email & Phone Number
System Feature Leader for Hardware Graphics @ Intel Corporation
5 free lookup(s).
Darshan Divecha Location
- Folsom, CA, US
Darshan Divecha Work
- 2021 - now System Feature Leader for Hardware Graphics @
- 2018 - 2021 Lead Power Management Verification Engineer @
- 2014 - 2018 Lead Functional Verification Engineer for Shared Function Units @
- 2010 - 2014 Cache Verification Engineer @
- 2010 - 2010 Design Verification Engineer @
- 2010 - 2010 Research Assistant @
- 2009 - 2010 Media Assistant @ Engineering Online
- 2008 - 2008 Research Assistant for Advanced VLSI @ University of Mumbai, India
- 2007 - 2007 Assistant at ISTE (Indian Society for Technical Education) students' chapter-KJSCE @ ISTE
Darshan Divecha Education
- North Carolina State University
Master's degree (Electrical and Electronics Engineering)
2008 - 2010 - University of Mumbai
Bachelor of Engineering (Electronics Engineering)
2004 - 2008
Darshan Divecha Skills
- Verilog
- ModelSim
- C
- SystemVerilog
- VLSI
- VHDL
- Perl
- ASIC
- Functional Verification
- RTL design
- Computer Architecture
- Testing
- Application-Specific Integrated Circuits (ASIC)
- Debugging
- Graphics
- Application Specific Integrated Circuits Asic
- Computer Hardware
- Hardware
- Application Specific Integrated Circuits
Darshan Divecha Summary
- Darshan Divecha, based in Folsom, CA, US, is currently a System Feature Leader for Hardware Graphics at Intel Corporation. Darshan Divecha brings experience from previous roles at Intel Corporation and Algo-Logic Systems. Darshan Divecha holds a 2008 - 2010 Master's degree in Electrical and Electronics Engineering @ North Carolina State University. With a robust skill set that includes Verilog, ModelSim, C, SystemVerilog, VLSI and more. Darshan Divecha has 3 emails and 1 mobile phone numbers on RocketReach.
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