Darshan Divecha Email & Phone Number
System Feature Leader for Hardware Graphics @ Intel Corporation
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Darshan Divecha Location
- Folsom, CA, US
Darshan Divecha Work
- System Feature Leader for Hardware Graphics @ (April 2021 - Present)
- Lead Power Management Verification Engineer @ (May 2018 - April 2021)
- Lead Functional Verification Engineer for Shared Function Units @ (April 2014 - April 2018)
- Cache Verification Engineer @ (December 2010 - March 2014)
- Design Verification Engineer @ (October 2010 - December 2010)
- Research Assistant @ (September 2010 - October 2010)
- Media Assistant @ Engineering Online (January 2009 - May 2010)
- Research Assistant for Advanced VLSI @ University of Mumbai, India (January 2008 - May 2008)
- Assistant at ISTE (Indian Society for Technical Education) students' chapter-KJSCE @ ISTE (January 2007 - May 2007)
Darshan Divecha Education
- North Carolina State University
Master's degree (Electrical and Electronics Engineering)
2008-2010 - University of Mumbai
Bachelor of Engineering (Electronics Engineering)
2004-2008
Darshan Divecha Skills
- Verilog
- ModelSim
- C
- SystemVerilog
- VLSI
- VHDL
- Perl
- ASIC
- Functional Verification
- RTL design
- Computer Architecture
- Testing
- Application-Specific Integrated Circuits (ASIC)
- Debugging
- Graphics
- Application Specific Integrated Circuits Asic
- Computer Hardware
- Hardware
- Application Specific Integrated Circuits
Darshan Divecha Summary
- Darshan Divecha, based in Folsom, CA, US, is currently a System Feature Leader for Hardware Graphics at Intel Corporation. Darshan Divecha brings experience from previous roles at Intel Corporation and Algo-Logic Systems. Darshan Divecha holds a 2008 - 2010 Master's degree in Electrical and Electronics Engineering @ North Carolina State University. With a robust skill set that includes Verilog, ModelSim, C, SystemVerilog, VLSI and more. Darshan Divecha has 3 emails and 1 mobile phone numbers on RocketReach.
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