Daniel Sill Email & Phone Number
PMTS Systems Design Engineer @ AMD
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Daniel Sill Location
- Austin, TX, US
Daniel Sill Work
- PMTS Systems Design Engineer @ (June 2018 - Present)
- Principal PCB Design Engineer @ (July 2012 - June 2018)
- Principal PCB Design Engineer @ (July 2012 - June 2018)
- Senior PCB Layout Design Engineer @ (January 2000 - July 2012)
- Partner @ Zephyr Software (January 1992 - December 2009)
Daniel Sill Education
- Austin Community College
IC Mask Layout Certification
2007-2007 - IPC Designers Council
CID (CID+ Certifications, PCB Layout)
2000-2004 - Texas State University
BSCS (ASM Programming/ Computer Hardware)
1984-1989
Daniel Sill Skills
- Allegro
- Board Layout
- CAM350
- Cadence
- Cadence EDA Tools
- Cadstar
- Committed to Professionalism
- DDR2
- DDR3
- DFM
- DFT
- Debugging
- Design for Manufacturing
- Electrical Engineering
- FMC
- FPGA
- GDDR5
- Hardware Architecture
- High Speed Design
- HyperTransport
- I2C
- Mentor Graphics EDA Tools
- Microprocessors
- Network
- Orcad
- PCB Design
- PCI
- PCIe
- PMC
- Processors
- SATA
- Schematic Capture
- Signal Integrity
- USB
- VITA
- VPX
- Valor
- XMC
- Zuken
Daniel Sill Summary
- Daniel Sill, based in Austin, TX, US, is currently a PMTS Systems Design Engineer at AMD. Daniel Sill brings experience from previous roles at 4DSP Inc., Abaco Systems, Inc., AMD and Zephyr Software. Daniel Sill holds a 2007 - 2007 IC Mask Layout Certification @ Austin Community College. With a robust skill set that includes Allegro, Board Layout, CAM350, Cadence, Cadence EDA Tools and more. Daniel Sill has 3 emails and 1 mobile phone numbers on RocketReach.
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