Daniel Shafer Email & Phone Number
Senior Principal Engineer @ JRC Integrated Systems
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Daniel Shafer Location
- Indianapolis, IN, US
Daniel Shafer Work
- Senior Principal Engineer @ (October 2024 - Present)
- Electrical Engineering Supervisor @ (June 2024 - Present)
- Senior FPGA Design Engineer @ (October 2023 - June 2024)
- Lead FPGA Design Engineer @ Vertex Aerospace (January 2022 - June 2023)
- Senior Electrical Engineer @ (March 2019 - July 2022)
- Component Test Engineer @ (October 2017 - July 2018)
- Project Design Engineer @ (August 2017 - October 2017)
- Electrical Engineer - Co-Op @ (January 2011 - December 2014)
Daniel Shafer Education
- Texas State University 2012-2017
Daniel Shafer Summary
- Daniel Shafer, based in Indianapolis, IN, US, is currently a Senior Principal Engineer at JRC Integrated Systems. Daniel Shafer brings experience from previous roles at SAIC, Vertex Aerospace and Raytheon. Daniel Shafer holds a 2012 - 2017 Texas State University. Daniel Shafer has 4 emails and 3 mobile phone numbers on RocketReach.
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