Daniel Breslawski Email & Phone Number
Senior FPGA Engineer @ D3 Embedded
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Daniel Breslawski Location
- Rochester, NY, US
Daniel Breslawski Work
- Senior FPGA Engineer @ (October 2025 - Present)
- FPGA Engineer @ (January 2024 - October 2025)
- Silicon Design Engineer Intern @ (May 2023 - December 2023)
- Teaching Assistant @ (January 2023 - May 2023)
- Teaching Assistant @ (August 2022 - December 2022)
- Data Science Technician - Academic Services @ (January 2022 - September 2022)
- Software Engineer Intern @ (December 2020 - August 2021)
- Department Assistant - Academic Services @ (January 2019 - April 2020)
- Operations Support Help Desk @ (June 2016 - August 2018)
- Internet Banker @ (July 2013 - August 2016)
Daniel Breslawski Education
- Rochester Institute of Technology
BS/MS Dual Degree (Computer Engineering)
2020-2023 - Monroe Community College
Associate of Science - AS (Computer Engineering)
2018-2020
Daniel Breslawski Skills
- Tableau
- Field-Programmable Gate Arrays (FPGA)
- Embedded Systems
- SystemVerilog
- Perl
- Logic Design
- Clock Distribution
- Analog Circuit Design
- OpenMPI
- Parallel Programming
- High Performance Computing (HPC)
- Verilog
- Linux
- SQL
- VHDL
- C (Programming Language)
- Data Structures
- C++
- Python (Programming Language)
- Object-Oriented Programming (OOP)
Daniel Breslawski Summary
- Daniel Breslawski, based in Rochester, NY, US, is currently a Senior FPGA Engineer at D3 Embedded. Daniel Breslawski brings experience from previous roles at D3 Embedded, AMD and Rochester Institute of Technology. Daniel Breslawski holds a 2020 - 2023 BS/MS Dual Degree in Computer Engineering @ Rochester Institute of Technology. With a robust skill set that includes Tableau, Field-Programmable Gate Arrays (FPGA), Embedded Systems, SystemVerilog, Perl and more. Daniel Breslawski has 1 emails and 1 mobile phone numbers on RocketReach.
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