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Dan Sides Location
Beaverton, OR, US
Dan Sides Work
2015 -now IP Design Engineer @
2013 -now FPGA Design Contractor @
2010 -2012 Lead FPGA IP Design Engineer @
2008 -2010 FPGA Engineering Manager @
2006 -2008 FPGA Applications Engineer @
2001 -2006 ASIC Design Engineer @
2000 -2001 ASIC Designer @ Nortel Networks
1996 -2000 ASIC Design Consultant @
Dan Sides Education
University of North Carolina at Charlotte
MS (Electrical Engineering)
Berea College
Bachelor's degree (Mathematics)
Dan Sides Skills
RAMS
See 8+See Less
Logic Design
Engineering Management
Synthesis
Debugging
Gate Level Simulation
Logic Synthesis
Functional Verification
RTL design
DFT
ASIC
CAD
Verilog
Microcontrollers
Technical Writing
Technical Documentation
Mixed Signal
Embedded Systems
FPGA
SoC
VHDL
Timing Closure
Semiconductors
Simulations
Design
Static Timing Analysis
Product Specification
Hardware
Dan Sides Summary
Dan Sides, based in Beaverton, OR, US, is currently a IP Design Engineer at Intel Corporation. Dan Sides brings experience from previous roles at Intel Corporation and Lattice Semiconductor. Dan Sides holds a MS in Electrical Engineering @ University of North Carolina at Charlotte. With a robust skill set that includes RAMS, See 8+See Less, Logic Design, Engineering Management, Synthesis and more. Dan Sides has 4 emails and 4 mobile phone numbers on RocketReach.
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