Dan Sides's Location
Beaverton, OR, US
Dan Sides's Work
- IP Design Engineer @ Intel Capital
- FPGA Design Contractor @ Intel Corporation
- Lead FPGA IP Design Engineer @ Lattice Semiconductor
- FPGA Engineering Manager @ Lattice Semiconductor
- FPGA Applications Engineer @ Lattice Semiconductor
- ASIC Design Engineer @ Intel Capital
- ASIC Designer @ Nortel Networks
- ASIC Design Consultant @ Mentor Graphics
Dan Sides's Education
- University of North Carolina at Charlotte
Dan Sides's Skills
- RAMS
- See 8+See Less
- Logic Design
- Engineering Management
- Synthesis
- Debugging
- Gate Level Simulation
- Logic Synthesis
- Functional Verification
- RTL design
Dan Sides's Summary
Dan Sides, based in Beaverton, OR, US, is currently a IP Design Engineer at Intel Corporation, bringing experience from previous roles at Intel Corporation and Lattice Semiconductor. Dan Sides holds a University of North Carolina at Charlotte. With a robust skill set that includes RAMS, See 8+See Less, Logic Design, Engineering Management, Synthesis and more, Dan Sides contributes valuable insights to the industry. Dan Sides has 7 emails and 1 mobile phone number on RocketReach.
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