Claudia Barrera's Location
San Jose, CA, US
Claudia Barrera's Work
- Power Delivery Circuit Architecture Manager @ Intel Corporation
- Analog Design Engineer @ Intel Corporation
- Research Assistant @ University of Delaware
Claudia Barrera's Education
- University of Delaware
Doctor of Philosophy (Engineering)
2004 - 2009 - Pontificia Universidad Javeriana
Bachelor of Science (Electronics Engineering)
1998 - 2003
Claudia Barrera's Skills
- Simulations
- Matlab
- Signal Processing
- Verilog
- Semiconductors
- Digital Signal Processors
- Embedded Systems
- C++
- Labview
- FPGA
Claudia Barrera's Summary
Claudia Barrera, based in San Jose, CA, US, is currently a Power Delivery Circuit Architecture Manager at Intel Corporation, bringing experience from previous roles at Intel Corporation and University of Delaware. Claudia Barrera holds a 2004 - 2009 Doctor of Philosophy in Engineering @ University of Delaware. With a robust skill set that includes Simulations, Matlab, Signal Processing, Verilog, Semiconductors and more, Claudia Barrera contributes valuable insights to the industry. Claudia Barrera has 3 emails on RocketReach.
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