Chun-Han Chen Email & Phone Number
Senior Verification Engineer @ NVIDIA
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Chun-Han Chen Location
- Sunnyvale, CA, US
Chun-Han Chen Work
- Senior Verification Engineer @ (December 2025 - Present)
- Senior Staff Design Verification Engineer @ (August 2022 - December 2025)
- Manager, Cache DV team, AI group @ (September 2020 - August 2022)
- Staff Design Verification Engineer @ (November 2018 - September 2020)
- Staff Design Verification Engineer @ (September 2014 - November 2018)
- Senior Verification Engineer @ (August 2011 - September 2014)
- ASIC Design Engineer @ (March 2010 - August 2011)
Chun-Han Chen Education
- Carnegie Mellon University
Master of Science (M.S.) (Electrical and Computer Engineering)
2008-2009 - National Chiao Tung University
Bachelor of Science (BS) (Electrical, Electronics and Communications Engineering)
2001-2005
Chun-Han Chen Skills
- ASIC
- Application-Specific Integrated Circuits (ASIC)
- C
- C++
- Cache
- Computer Architecture
- FPGA
- Functional Verification
- GPGPU
- Linux
- Logic Design
- Matlab
- ModelSim
- Parallel Computing
- Perl
- Python
- RTL design
- Shell Scripting
- SoC
- SystemVerilog
- SystemVerilog Assertion
- UVM
- Universal Verification Methodology (UVM)
- VLSI
- Verilog
- Whitebox model
Chun-Han Chen Summary
- Chun-Han Chen, based in Sunnyvale, CA, US, is currently a Senior Verification Engineer at NVIDIA. Chun-Han Chen brings experience from previous roles at Qualcomm, Alibaba Group and Micron Technology. Chun-Han Chen holds a 2008 - 2009 Master of Science (M.S.) in Electrical and Computer Engineering @ Carnegie Mellon University. With a robust skill set that includes ASIC, Application-Specific Integrated Circuits (ASIC), C, C++, Cache and more. Chun-Han Chen has 2 emails and 2 mobile phone numbers on RocketReach.
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