Chuan Loo Email

Senior FPGA Prototype Design Engineer @ Intel Corporation

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Chuan Loo Location

Bayan Lepas, MY

Chuan Loo Work

2021 -now Senior FPGA Prototype Design Engineer @
2017 -2021 FPGA Prototype Design Engineer @
2016 -2016 Pre-Silicon Validation Intern @

Chuan Loo Education

Universiti Sains Malaysia
Master's degree (Master of Science (Microelectronics Engineering))
2019-2020
Universiti Tenaga Nasional
Bachelor's degree (Electrical and Electronics Engineering)
2013-2017
Universiti Tenaga Nasional
Foundation degree (Foundation in Engineering)
2012-2013

Chuan Loo Summary

Chuan Loo, based in Bayan Lepas, MY, is currently a Senior FPGA Prototype Design Engineer at Intel Corporation. Chuan Loo brings experience from previous roles at Intel Corporation. Chuan Loo holds a 2019 - 2020 Master's degree in Master of Science (Microelectronics Engineering) @ Universiti Sains Malaysia. Chuan Loo has 2 emails on RocketReach.

Chuan Loo Emails

Found 2 emails

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