Chi-Te Chen Email & Phone Number
Senior Staff Engineer (Power Integrity and Signal Integrity) @ ASUS
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Chi-Te Chen Location
- Folsom, CA, US
Chi-Te Chen Work
- Senior Staff Engineer (Power Integrity and Signal Integrity) @ (May 2025 - Present)
- Analog Platform Architect @ (September 2022 - June 2025)
- Senior Staff Engineer - Power Integrity (Power Delivery) and Customer Focused @ (June 2015 - August 2022)
- Engineering Manager – Package development and Power integrity (Power Delivery) Team @ (August 2012 - June 2015)
- Engineering Manager – Power Integrity (Power Delivery) Team @ (July 2011 - August 2012)
- Senior Analog Engineer (Power Integrity Focused) @ (August 2005 - July 2011)
- Senior Signal Integrity Engineer @ (October 2001 - August 2005)
Chi-Te Chen Education
- University of Washington
PhD Candidate (Electrical Engineering)
1996-2001 - University of Washington
Master’s Degree (Electrical Engineering)
1994-1996 - National Taiwan University
Bachelor of Science (Electrical Engineering)
1990-1994
Chi-Te Chen Summary
- Chi-Te Chen, based in Folsom, CA, US, is currently a Senior Staff Engineer (Power Integrity and Signal Integrity) at ASUS. Chi-Te Chen brings experience from previous roles at Intel Corporation. Chi-Te Chen holds a 1996 - 2001 PhD Candidate in Electrical Engineering @ University of Washington. Chi-Te Chen has 3 emails and 3 mobile phone numbers on RocketReach.
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