2025 -now Senior Staff Engineer (Power Integrity and Signal Integrity) @
2022 -2025 Analog Platform Architect @
2015 -2022 Senior Staff Engineer - Power Integrity (Power Delivery) and Customer Focused @
2012 -2015 Engineering Manager – Package development and Power integrity (Power Delivery) Team @
2011 -2012 Engineering Manager – Power Integrity (Power Delivery) Team @
2005 -2011 Senior Analog Engineer (Power Integrity Focused) @
2001 -2005 Senior Signal Integrity Engineer @
Chi-Te Chen Education
University of Washington
PhD Candidate (Electrical Engineering)
1996-2001
University of Washington
Master’s Degree (Electrical Engineering)
1994-1996
National Taiwan University
Bachelor of Science (Electrical Engineering)
1990-1994
Chi-Te Chen Summary
Chi-Te Chen, based in Folsom, CA, US, is currently a Senior Staff Engineer (Power Integrity and Signal Integrity) at ASUS. Chi-Te Chen brings experience from previous roles at Intel Corporation. Chi-Te Chen holds a 1996 - 2001 PhD Candidate in Electrical Engineering @ University of Washington. Chi-Te Chen has 3 emails and 3 mobile phone numbers on RocketReach.
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