Chen Yang Email & Phone Number
Low Latency FPGA Engineer @ Citadel Securities
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Chen Yang Location
- New York, NY, US
Chen Yang Work
- 2025 -now Low Latency FPGA Engineer @
- 2019 -2025 Low Latency FPGA Engineer @
- 2014 -2019 Research Assistant @
- 2017 -2017 Research Aide @
- 2016 -2016 Quality Engineer Intern @
- 2015 -2016 Graduate Teaching Fellow @
- 2014 -2014 Software Engineer Intern @
- 2013 -2014 Hardware Engineer Intern @
Chen Yang Education
- Boston University
Doctor of Philosophy (Ph.D.) (Communication Infrastructure and Application Acceleration on Multi-FPGA Platforms)
2014-2020 - University of Florida
Master of Science (Electrical and Computer Engineering)
2012-2014 - Wuhan University
Bachelor of Engineering (Electrical Engineering)
2008-2012
Chen Yang Summary
- Chen Yang, based in New York, NY, US, is currently a Low Latency FPGA Engineer at Citadel Securities. Chen Yang brings experience from previous roles at Citadel Securities, Boston University, Argonne National Laboratory and The MathWorks. Chen Yang holds a 2014 - 2020 Doctor of Philosophy (Ph.D.) in Communication Infrastructure and Application Acceleration on Multi-FPGA Platforms @ Boston University. Chen Yang has 2 emails and 7 mobile phone numbers on RocketReach.
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