Chee Chu Email & Phone Number
VP, DFM Engineering @ Pure Storage
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Chee Chu Location
- Santa Clara, CA, US
Chee Chu Work
- VP, DFM Engineering @ (November 2025 - Present)
- Vice President Systems Engineering @ (July 2025 - November 2025)
- Chief Executive Officer @ (January 2024 - July 2025)
- Vice President of Systems Engineering @ (December 2015 - December 2023)
- Systems Engineering VP @ (July 2022 - July 2025)
- Senior Engineering Director @ (December 2012 - December 2015)
- Engineering Director @ (February 2002 - December 2012)
- Snr ASIC Design Engineer @ (January 1999 - December 2002)
- Senior ASIC Design Engineer @ NEC (January 1994 - December 2000)
Chee Chu Skills
- ASIC
- System Architecture
- Semiconductors
- IC
- Serial ATA (SATA)
- Serial Attached SCSI (SAS)
- PCIe Gen3
- Error Injection Architect
- AHCI
- NVMe
- Verilog
- Debugging
- Embedded Systems
- FPGA
- ARM
- SoC
- Analog
- Firmware
- Hardware Architecture
- Mixed Signal
- Embedded Software
- Device Drivers
- Memory
- Systems Engineering
- Serial Ata Sata
- Serial Attached Scsi
- Solutions
- Serial Attached Scsi Sas
- Design
- Error Injection
- Asic Design
- Serial Ata
Chee Chu Summary
- Chee Chu, based in Santa Clara, CA, US, is currently a VP, DFM Engineering at Pure Storage. Chee Chu brings experience from previous roles at SK hynix memory solutions America Inc. and Solidigm. With a robust skill set that includes ASIC, System Architecture, Semiconductors, IC, Serial ATA (SATA) and more. Chee Chu has 2 emails and 2 mobile phone numbers on RocketReach.
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