Physical Design Engineer @ Intel (September 2019 - February 2020)
Physical Design Engineer @ Intel (December 2018 - September 2019)
Physical Design Engineer @ Seakr (March 2017 - December 2018)
Physical Design Engineer @ Cavium (January 2018 - May 2018)
Physical Design Engineer @ Rambus (September 2017 - January 2018)
Chan Lu Education
University of California, Davis
Bachelor's degree (Computer Engineering)
2011-2016
Chan Lu Skills
Physical Design
Engineering
Application-Specific Integrated Circuits (ASIC)
Shell Scripting
Hardware Architecture
Scripting
Object-Oriented Programming (OOP)
Field-Programmable Gate Arrays (FPGA)
C/C++
Perl
Linux
Verilog
Real-Time Operating Systems (RTOS)
Windows
Matlab
Embedded Systems
Microsoft Office
Java
Cadence Innovus
Synopsys ICC
Mentor Graphics Calibre
TCL
Cadence Tempus
Design Rule Checking (DRC)
Layout Versus Schematic (LVS)
Static Timing Analysis (STA)
Algorithms and Data Structures
Digital Image Processing
Digital Signal Processing
GNU Compiler Collection (GCC)
Laboratory Equipment
RTL Design
Regular Expressions
Synopsys Primetime
Chan Lu Summary
Chan Lu, based in San Jose, CA, US, is currently a Physical Design Engineer Consultant at Synapse Design Automation. Chan Lu brings experience from previous roles at Dialog Semiconductor, Intel and Seakr. Chan Lu holds a 2011 - 2016 Bachelor's degree in Computer Engineering @ University of California, Davis. With a robust skill set that includes Physical Design, Engineering, Application-Specific Integrated Circuits (ASIC), Shell Scripting, Hardware Architecture and more. Chan Lu has 1 emails and 2 mobile phone numbers on RocketReach.
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