Ch Patro Email
Layout Design Engineer @ Intel Corporation
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Ch Patro Location
- Bengaluru, KA, IN
Ch Patro Work
- 2021 -now Layout Design Engineer @
- 2021 -2021 Design Engineer @
- 2020 -2021 Analog Layout Design engineer @
- 2020 -2020 Foundation of VLSI design @
Ch Patro Education
- Silicon Institute of Technology (SIT), Bhubaneswar
Bachelor of Technology - BTech (Electronics and Communications Engineering)
2017-2021 - Saraswati vidya mandir, Neelakanta nagar, Berhampur
12th (PCM)
2016-2017 - Saraswati sishu Vidya mandir, Neelakanta nagar
Matriculation (All subject)
2014-2015
Ch Patro Summary
- Ch Patro, based in Bengaluru, KA, IN, is currently a Layout Design Engineer at Intel Corporation. Ch Patro brings experience from previous roles at Sevya Multimedia and VLSI Expert Private Limited. Ch Patro holds a 2017 - 2021 Bachelor of Technology - BTech in Electronics and Communications Engineering @ Silicon Institute of Technology (SIT), Bhubaneswar. Ch Patro has 2 emails on RocketReach.
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