Cejo Lonappan Email & Phone Number
Principal Systems Engineer @ SiLC Technologies, Inc
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Cejo Lonappan Location
- Los Angeles, CA, US
Cejo Lonappan Work
- 2021 -now Principal Systems Engineer @
- 2019 -2021 Senior Hardware Engineer @
- 2017 -2024 Chair @ IEEE Photonics Society Los Angeles Chapter, Coastal LA Section
- 2018 -2019 Postdoctoral Researcher @
- 2010 -2018 Graduate Student Researcher @
- 2016 -2017 Teaching Assistant for EE180D System Design @
- 2016 -2016 Teaching Assistant for EEM116L and CSM152A Introductory Digital Design Laboratory @
- 2011 -2016 Graduate Student Researcher @ Center for Integrated Access Networks, an NSF funded ERC
- 2009 -2010 Research Project Staff @
- 2009 -2009 Chairperson @
- 2007 -2009 Lecturer @
- 2006 -2007 Post Silicon Test Engineer @
Cejo Lonappan Education
- UCLA
Doctor of Philosophy (Ph.D.) (Electrical Engineering)
2013-2018 - UCLA
Master of Science (MS) (Electrical Engineering)
2010-2012 - Model Engineering College
B. Tech (Electronics and Communication Engineering)
2000-2004 - Navanirman Senior Secondary School, Kochi
High School (Quizzing team, Track and field events)
1995-2000
Cejo Lonappan Skills
- Verilog
- FPGA
- Simulations
- VLSI
- Analog Circuit Design
- Signal Processing
- Semiconductors
- ASIC
- Mixed Signal
- Electronics
- Characterization
- RF
- Image Processing
- Physics
- Circuit Design
- Shell Scripting
- Embedded Systems
- Matlab
- C
- VHDL
- Unix
- Simulink
- LaTeX
- C++
- Python
- CAD Tools
- RF design
- EDA
- Integrated Circuit Design
- Circuit Testing
- Signal Integrity
- Photonics
- Xilinx
- Real-time Hardware Design
- Cadence Virtuoso
- PLL
- Cadence Spectre
- Silicon
- Cadence Ocean
- Verilog-A
- GNU/Linux
- OrCAD Capture
- Tcl/Tk
- Oscilloscope
- CMOS
- SPICE
- VPI Photonics
- Firmware
- Data Acquisition
- System Control
- PCI Express based digitizer
- High Speed Digitizers
- Cadence SKILL
- Octave
- Digital Signal Processors
- Field Programmable Gate Arrays Fpga
- HSPICE
- PCIe
- Engineering
- Network Analyzer
- Real Time Hardware Design
- Allegro
- Very Large Scale Integration Vlsi
- Vlsi Design
Cejo Lonappan Summary
- Cejo Lonappan, based in Los Angeles, CA, US, is currently a Principal Systems Engineer at SiLC Technologies, Inc. Cejo Lonappan brings experience from previous roles at SiLC Technologies, Inc, IEEE Photonics Society Los Angeles Chapter, Coastal LA Section, University of California, Los Angeles and UCLA. Cejo Lonappan holds a 2013 - 2018 Doctor of Philosophy (Ph.D.) in Electrical Engineering @ UCLA. With a robust skill set that includes Verilog, FPGA, Simulations, VLSI, Analog Circuit Design and more. Cejo Lonappan has 4 emails and 3 mobile phone numbers on RocketReach.
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