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Cejo Lonappan Location
Los Angeles, CA, US
Cejo Lonappan Work
Principal Systems Engineer @ (May 2021 - Present)
Senior Hardware Engineer @ (June 2019 - May 2021)
Chair @ IEEE Photonics Society Los Angeles Chapter, Coastal LA Section (September 2017 - September 2024)
Postdoctoral Researcher @ (September 2018 - August 2019)
Graduate Student Researcher @ (September 2010 - August 2018)
Teaching Assistant for EE180D System Design @ (September 2016 - March 2017)
Teaching Assistant for EEM116L and CSM152A Introductory Digital Design Laboratory @ (March 2016 - June 2016)
Graduate Student Researcher @ Center for Integrated Access Networks, an NSF funded ERC (January 2011 - February 2016)
Research Project Staff @ (July 2009 - July 2010)
Chairperson @ (January 2009 - December 2009)
Lecturer @ (November 2007 - July 2009)
Post Silicon Test Engineer @ (January 2006 - March 2007)
Cejo Lonappan Education
UCLA
Doctor of Philosophy (Ph.D.)
2013-2018
UCLA
Master of Science (MS)
2010-2012
Model Engineering College
B. Tech
2000-2004
Navanirman Senior Secondary School, Kochi
High School
1995-2000
Cejo Lonappan Skills
Verilog
FPGA
Simulations
VLSI
Analog Circuit Design
Signal Processing
Semiconductors
ASIC
Mixed Signal
Electronics
Characterization
RF
Image Processing
Physics
Circuit Design
Shell Scripting
Embedded Systems
Matlab
C
VHDL
Unix
Simulink
LaTeX
C++
Python
CAD Tools
RF design
EDA
Integrated Circuit Design
Circuit Testing
Signal Integrity
Photonics
Xilinx
Real-time Hardware Design
Cadence Virtuoso
PLL
Cadence Spectre
Silicon
Cadence Ocean
Verilog-A
GNU/Linux
OrCAD Capture
Tcl/Tk
Oscilloscope
CMOS
SPICE
VPI Photonics
Firmware
Data Acquisition
System Control
PCI Express based digitizer
High Speed Digitizers
Cadence SKILL
Octave
Digital Signal Processors
Field Programmable Gate Arrays Fpga
HSPICE
PCIe
Engineering
Network Analyzer
Real Time Hardware Design
Allegro
Very Large Scale Integration Vlsi
Vlsi Design
Cejo Lonappan Summary
Cejo Lonappan, based in Los Angeles, CA, US, is currently a Principal Systems Engineer at SiLC Technologies, Inc. Cejo Lonappan brings experience from previous roles at SiLC Technologies, Inc, IEEE Photonics Society Los Angeles Chapter, Coastal LA Section and University of California, Los Angeles. Cejo Lonappan holds a 2013 - 2018 Doctor of Philosophy (Ph.D.) @ UCLA. With a robust skill set that includes Verilog, FPGA, Simulations, VLSI, Analog Circuit Design and more. Cejo Lonappan has 4 emails and 3 mobile phone numbers on RocketReach.
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