If you need more lookups,
subscriptions start at $34 USD/month.
Carlos Cabral Location
Austin, TX, US
Carlos Cabral Work
ASIC IP Development Manager @ (June 2019 - Present)
Hardware Development Engineer, AWS @ (January 2015 - June 2019)
IP Design and Verification Manager @ (May 2011 - January 2015)
Senior ASIC Design Engineer @ (January 2009 - May 2011)
Debug IP Design Engineer @ (April 2008 - January 2009)
IP and SoC Design Engineer @ (May 1999 - January 2008)
Carlos Cabral Education
The University of Texas at Austin
M.S. (Electrical and Computer Engineering)
The University of Texas at Austin
B.S. (Electrical Engineering)
The University of Texas at Austin
B.A. (Plan II Honor Liberal Arts)
Carlos Cabral Skills
SoC
ASIC
Verilog
Static Timing Analysis
Technical Documentation
SystemVerilog
RTL design
Logic Design
Logic Synthesis
Integrated Circuit Design
FPGA
IC
C
Functional Verification
Hardware Architecture
Perl
VLSI
Microarchitecture
RTL coding
DFT
Processors
AMBA AHB
Microprocessors
Circuit Design
Physical Design
JTAG
Low-power Design
Timing Closure
EDA
PCIe
Verification
Leadership
Development
System On A Chip Soc
Integrated Circuits Ic
Embedded Systems
Testing
Application Specific Integrated Circuits Asic
Optimization
Low Power Design
Integrated Circuits
Application Specific Integrated Circuits
System on a Chip
Carlos Cabral Summary
Carlos Cabral, based in Austin, TX, US, is currently a ASIC IP Development Manager at Ericsson. Carlos Cabral brings experience from previous roles at Amazon Web Services, Freescale Semiconductor and LSI Corporation. Carlos Cabral holds a M.S. in Electrical and Computer Engineering @ The University of Texas at Austin. With a robust skill set that includes SoC, ASIC, Verilog, Static Timing Analysis, Technical Documentation and more. Carlos Cabral has 5 emails and 6 mobile phone numbers on RocketReach.
Looking for a different Carlos Cabral?
Find contact details for 700 million professionals.