2004 -2013 Member of Technical Staff - ASIC Hardware Engineer @
2000 -2004 Member of Technical Staff 3 - Hardware Engineer @
1998 -2000 Research Assistant - Computational Plasma Physics @
1996 -1998 Hardware Intern - Home and Building Controls Devision @
Brian Lay Education
University of Illinois Urbana-Champaign
MS (Electrical Engineering)
1998-2000
University of Minnesota
BS (Electrical Engineering)
1994-1998
Brian Lay Skills
VLSI
Physical Design
Microprocessors
Logic Design
Static Timing Analysis
Perl
Circuit Design
ASIC
Cadence Virtuoso
SoC
Debugging
RTL design
Verilog
Processors
Photoshop
Testing
Design
Product Marketing
Leadership
PowerPoint
Brian Lay Summary
Brian Lay, based in Boulder, CO, US, is currently a Senior Manager - Vivado FPGA Software Application Engineer at AMD. Brian Lay brings experience from previous roles at Xilinx, AMD and Sun Microsystems. Brian Lay holds a 1998 - 2000 MS in Electrical Engineering @ University of Illinois Urbana-Champaign. With a robust skill set that includes VLSI, Physical Design, Microprocessors, Logic Design, Static Timing Analysis and more. Brian Lay has 3 emails and 1 mobile phone numbers on RocketReach.
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