Brian Hovis Email & Phone Number

Brian Hovis Skills

• Verilog
• VHDL and Verilog Programming
• ARM CPU Design Experience
• SOC Design and Integration
• Low Power/High Performance Design Strategies
• HDL Synthesis
• Clock Tree Synthesis
• Performance Verification
• Auto Place and Route (APR)
• Logic Design and Verification
• Gate Level Verification (IP and SOC level)
• Printed Circuit Board Design (PCB)
• Computing/Design Enviroment Support/Implementation
• Design For Testability (DFT)
• Perl Scripting
• Linux/Unix Environment
• PCB design
• Processors
• Linux
• ARM
• VHDL
• FPGA
• Physical Design
• Hardware Architecture
• High Performance Computing
• Microprocessors
• SoC
• Low-power Design
• Logic Synthesis
• Semiconductors
• Functional Verification
• Perl
• RTL Design
• ASIC
• Application-Specific Integrated Circuits (ASIC)
• System on a Chip (SoC)
• Gate Level Verification Ip And Soc Level
• System On A Chip Soc
• Printed Circuit Board Design Pcb
• Auto Place And Route Apr
• Application Specific Integrated Circuits Asic
• Design For Testability Dft
• Low Power Design
• Auto Place and Route
• Gate Level Verification
• Printed Circuit Board Design
• Design for Testability
• Application Specific Integrated Circuits
• System on a Chip