Brad Pierce's Location
California, United States
Brad Pierce's Work
- R and D Engineer, HDL Compiler @ Synopsys Inc
- R and D Manager, HDL Compiler @ Synopsys Inc
- R and D Engineer, HDL Compiler @ Synopsys Inc
- Co-Chair of SV-BC technical committee @ IEEE Std 1800 (SystemVerilog)
- SystemVerilog 3.1a BNF Annex Editor @ Accellera Systems Initiative
- R and D Engineer @ Cadence Design Systems
Brad Pierce's Education
- UCLA
Ph.D. (Computer Science)
Brad Pierce's Skills
- SystemVerilog
- Solving Customer Problems
- RTL Synthesis
- Multithreading
- Parsing
- Listening
- EDA
- Very Large Scale Integration
- Application Specific Integrated Circuits
- System on a Chip
Brad Pierce's Summary
Brad Pierce, based in California, United States, is currently a R and D Engineer, HDL Compiler at Synopsys Inc, bringing experience from previous roles at Synopsys Inc, Synopsys, IEEE Std 1800 (SystemVerilog) and Accellera Systems Initiative. Brad Pierce holds a Ph.D. in Computer Science @ UCLA. With a robust skill set that includes SystemVerilog, Solving Customer Problems, RTL Synthesis, Multithreading, Parsing and more, Brad Pierce contributes valuable insights to the industry. Brad Pierce has 2 emails on RocketReach.
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