Binh Pham Email & Phone Number
MTS Physical Design @ Etched.ai
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Binh Pham Location
- San Jose, CA, US
Binh Pham Work
- MTS Physical Design @ (May 2025 - Present)
- Physical Design Engineer @ (November 2023 - May 2025)
- Principal CAD Engineer @ (July 2021 - November 2023)
- Senior Staff Engineer @ (May 2019 - July 2021)
- Staff CAD Engineer @ Intel Corporation - SoftMachine (September 2014 - May 2019)
- Hardware Engineer @ (January 2010 - September 2014)
- Physical Design and Automation @ (April 2005 - October 2008)
- CAD Engineer @ (September 2001 - October 2002)
Binh Pham Education
- BS
Bachelor of Science (BS) (Electrical, Electronics and Communications Engineering)
Binh Pham Skills
- C
- C/C++
- C/C++ - Perl Translation XS
- Cadence Assura Rule Writer
- Cadence NC Verilog
- Cadence Virtuoso
- DRC
- EDA
- Floorplanning
- LVS
- Logic Synthesis
- Mentor Graphics Calibre Physical Verification
- Open Access
- Perl
- Physical Design
- Physical Verification
- Primetime
- SOC Encounter Place and Route
- Signal Integrity
- Static Timing Analysis
- Synops Vera Verification Environment
- Synopsy DFT Compiler
- Synopsys Design Compiler
- Synopsys IC Compiler
- Synopsys ICV
- TCL
- Timing Closure
- Verilog
- C
- Perl Translation Xs
- CAD
- Manufacturing
Binh Pham Summary
- Binh Pham, based in San Jose, CA, US, is currently a MTS Physical Design at Etched. Binh Pham brings experience from previous roles at Tenstorrent, Ampere and Intel Corporation - SoftMachine. Binh Pham holds a Bachelor of Science (BS) in Electrical, Electronics and Communications Engineering @ BS. With a robust skill set that includes C , C/C++, C/C++ - Perl Translation XS, Cadence Assura Rule Writer, Cadence NC Verilog and more. Binh Pham has 2 emails and 3 mobile phone numbers on RocketReach.
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