Bhupesh Balakrishnan Email & Phone Number
Vice President Silicon Engineering @ Ampere
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Bhupesh Balakrishnan Location
- Santa Clara, CA, US
Bhupesh Balakrishnan Work
- Vice President Silicon Engineering @ (January 2023 - Present)
- Sr Director Silicon Engineering @ (October 2017 - February 2023)
- Distinguished Engineer @ Veloce Technologies + Applied Macro (April 2010 - September 2017)
- Principal Hardware Engineer @ (October 2008 - April 2010)
- Sr Hardware Design Engineer (Implementation Lead) @ (October 2005 - January 2008)
- Staff Engineer @ (January 1999 - September 2005)
- MTS engineer @ (August 1997 - December 1999)
- Maintenence Engineer @ Philips Components (January 1991 - January 1997)
Bhupesh Balakrishnan Education
- CDAC, Pune
Dipl in VLSI design (HDL & Logic design)
1996-1997 - Savitribai Phule Pune University
BE E&TC (Electronics & Telecom)
1991-1996 - Cusrow Wadia Inst of Technology
DERE (Electronics)
1989-1991
Bhupesh Balakrishnan Skills
- Chip level planning
- Cpu implementation and physical design
- Floorplanning
- High speed clock planning & implementation
- Physical Design
- SoC
- Timing Closure
- Cse
- Marketing
- Strategic Planning
- Microsoft Office
- Microwave
- Business Analysis
Bhupesh Balakrishnan Summary
- Bhupesh Balakrishnan, based in Santa Clara, CA, US, is currently a Vice President Silicon Engineering at Ampere. Bhupesh Balakrishnan brings experience from previous roles at Ampere, Veloce Technologies + Applied Macro , Oracle and Montalvo Systems Inc. Bhupesh Balakrishnan holds a 1996 - 1997 Dipl in VLSI design in HDL & Logic design @ CDAC, Pune. With a robust skill set that includes Chip level planning, Cpu implementation and physical design, Floorplanning, High speed clock planning & implementation, Physical Design and more. Bhupesh Balakrishnan has 2 emails and 1 mobile phone numbers on RocketReach.
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