Bhaskar Kakani Email
Chief Executive Officer @ BITSILICA
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Bhaskar Kakani Location
- Hyderabad, IN
Bhaskar Kakani Work
- 2020 -now Chief Executive Officer @
- 2018 -2020 Senior Engineering Design Lead @
- 2017 -2018 Senior Member Of Technical Staff @
- 2015 -2017 Corporate Application Engineer @
- 2011 -2015 Senior Design Engineer @
- 2009 -2011 Hardware Development Engineer @
- 2008 -2009 ASIC Verification Engineer @ Tundra Semiconductors
- 2006 -2008 Research Assistant @
Bhaskar Kakani Education
- International Institute of Information Technology
Master's Degree (VLSI and Embedded Systems)
2006-2008
Bhaskar Kakani Skills
- Design Verification
- Hardware Emulation
- CXL
- RTL Design
- Universal Verification Methodology (UVM)
- SystemVerilog
- Public Administration
- Public Speaking
- Mathematics
- Verification and Validation (V&V)
- Functional Verification
- RTL Verification
- Formal Verification
- Assertion Based Verification
- System on a Chip (SoC)
- Application-Specific Integrated Circuits (ASIC)
- FPGA prototyping
- Business Development
- Proposal Writing
- Verilog
- ASIC
- PCIe
- AMBA
- AMBA CHI
- boot verification
- Very-Large-Scale Integration (VLSI)
- RTL Coding
- Field-Programmable Gate Arrays (FPGA)
- Integrated Circuits (IC)
- Validation
- Low-power Design
- Static Timing Analysis
- Logic Synthesis
- C (Programming Language)
Bhaskar Kakani Summary
- Bhaskar Kakani, based in Hyderabad, IN, is currently a Chief Executive Officer at BITSILICA. Bhaskar Kakani brings experience from previous roles at UST, Vaaluka Solutions, Synopsys Inc and Simpli5ng Semiconductors. Bhaskar Kakani holds a 2006 - 2008 Master's Degree in VLSI and Embedded Systems @ International Institute of Information Technology. With a robust skill set that includes Design Verification, Hardware Emulation, CXL, RTL Design, Universal Verification Methodology (UVM) and more. Bhaskar Kakani has 2 emails on RocketReach.
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