Senior Physical Design Engineer @ (July 2016 - November 2021)
Physical Design Engineer @ (March 2014 - March 2015)
Bhagyashree Wagh Education
Department Of Electronics University Of Pune
(Design)
2013-2013
North Maharashtra University
Master Of Science (Electronics)
2008-2010
S.S.V.P'S Science College Dhule
Bachelor Of Science (Electronics)
2005-2008
Bhagyashree Wagh Skills
Analog
Cadence
Cadence (5.1.41.0) & (6.1.4) LINUX/Win7,Win XP Mentor Graphics – IC Station, M
Cadence Spectre
Cadence Virtuoso
DRC
Design Rule Checking (DRC)
FPGA
Field-Programmable Gate Arrays (FPGA)
Floorplanning
IC Compiler
IC Layout
LVS
Layout Versus Schematic (LVS)
Physical Design
Physical Verification
Place & Route
RTL Design
Simulations
Spectre
Static Timing Analysis
Synthesys
Timing Closure
VHDL
VLSI
Verilog
Very-Large-Scale Integration (VLSI)
Virtuoso
Xilinx ISE
Cadence 5.1.41.0
Win Xp Mentor Graphics Ic Station
Cadence and Linux/Win7
Bhagyashree Wagh Summary
Bhagyashree Wagh, based in India, is currently a Senior Chip Design Engineer at NeuroBlade. Bhagyashree Wagh brings experience from previous roles at Pozibility Technologies Pvt Ltd and Intel Corporation. Bhagyashree Wagh holds a 2013 - 2013 Department Of Electronics University Of Pune. With a robust skill set that includes Analog, Cadence, Cadence (5.1.41.0) & (6.1.4) LINUX/Win7,Win XP Mentor Graphics – IC Station, M, Cadence Spectre, Cadence Virtuoso and more. Bhagyashree Wagh has 3 emails and 3 mobile phone numbers on RocketReach.
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