Benoit Jarry Email
Staff Circuit Design Engineer @ ASIC North
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Benoit Jarry Location
- Montreal, QC, CA
Benoit Jarry Work
- 2011 -now Staff Circuit Design Engineer @
- 2004 -2009 Lead analog circuit designer @
- 2002 -2002 Research assistant @
- 1998 -2001 Teaching Assistant @
- 2000 -2000 Analog circuit designer @
- 1998 -1998 Defense Research Assistant @ Defense Research Establishment
Benoit Jarry Education
- McGill University
MEE (Electrical Engineering)
2009-2009 - McGill University
Ph.D. (Electrical Engineering)
2001-2003 - McGill University
M.Eng (Electrical Engineering)
1999-2000 - McGill University
B.Eng (Electrical Engineering)
1995-1998
Benoit Jarry Skills
- Simulations
- Verilog
- VHDL
- Analog Circuit Design
- Circuit Design
- Integrated Circuit Design
- Matlab
- CMOS
- Cadence
- Electrical Engineering
Benoit Jarry Summary
- Benoit Jarry, based in Montreal, QC, CA, is currently a Staff Circuit Design Engineer at ASIC North. Benoit Jarry brings experience from previous roles at Cadence Design Systems, Universiteit Twente and McGill University. Benoit Jarry holds a 2009 - 2009 MEE in Electrical Engineering @ McGill University. With a robust skill set that includes Simulations, Verilog, VHDL, Analog Circuit Design, Circuit Design and more. Benoit Jarry has 1 emails on RocketReach.
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