Benjamin Mitchell Email & Phone Number
Lead FPGA Engineer @ DRW
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Benjamin Mitchell Location
- Chicago, IL, US
Benjamin Mitchell Work
- Lead FPGA Engineer @ (January 2019 - Present)
- Senior FPGA Engineer @ (August 2017 - December 2018)
- Developer @ (December 2015 - May 2017)
- Junior Developer @ (June 2015 - December 2015)
- Graphics Hardware Engineer @ (April 2011 - May 2015)
- Mentor for Computer Systems Organization Class @ USC, Viterbi School of Engineering (August 2010 - December 2010)
- Web Developer and Technician @ RedLight Fusion (June 2006 - August 2008)
Benjamin Mitchell Education
- University of Southern California
MSEE (Electrical Engineering, VLSI/IC Design)
2009-2010 - University of Southern California
BSEE (Electrical Engineering, VLSI)
2006-2009 - New Roads
Benjamin Mitchell Skills
- Assertion Based Verification
- C
- C#
- C++
- Cadence Conformal / LEC
- Computer Architecture
- Debugging
- Formal Verification
- Git
- Integrated Circuit Design
- Logic Design
- Logic Synthesis
- Performance Verification
- Perl
- Placement-and-Routing
- RTL Design
- Synopsys DC
- Synopsys ICC
- Synthesis
- SystemVerilog
- TCL
- VLSI
- Verilog
- Cadence Conformal
- Placement And Routing
- Graphics
- Data Validation
- Edge
- Validation
- Lec
- Verification
- Cpu
- Hardware
Benjamin Mitchell Summary
- Benjamin Mitchell, based in Chicago, IL, US, is currently a Lead FPGA Engineer at DRW. Benjamin Mitchell brings experience from previous roles at DRW, Akuna Capital and Intel Corporation. Benjamin Mitchell holds a 2009 - 2010 MSEE in Electrical Engineering, VLSI/IC Design @ University of Southern California. With a robust skill set that includes Assertion Based Verification, C, C#, C++, Cadence Conformal / LEC and more. Benjamin Mitchell has 2 emails and 2 mobile phone numbers on RocketReach.
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