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Ben Kerr Location
California, United States
Ben Kerr Work
2018 -now Silicon Engineer @
2015 -2018 Senior Principal ASIC Engineer @
2014 -2015 Principal ASIC Engineer @
2012 -2014 Principal ASIC Engineer @
2007 -2012 ASIC Engineer @
2005 -2007 ASIC Engineer @ Oxford Semiconductor
2003 -2005 Hardware Engineer @
2002 -2003 ASIC Engineer @
2001 -2002 ASIC Engineer @ Jennic Ltd
1994 -2000 Principal Hardware Engineer @
1998 -1999 Hardware Engineer @
Ben Kerr Education
De Montfort University
Bachelor of Engineering (Engineering)
1991-1995
Nene College
(Engineering)
1989-1991
Ben Kerr Skills
Linux
ASIC
Verilog
SystemVerilog
RTL design
SoC
Xilinx
Simulation
SERDES
Primetime
NCSim
FPGA
Static Timing Analysis
ModelSim
ATPG
Embedded Systems
Timing Closure
Formal Verification
Logic Design
Digital Design
Hardware Design
RTL coding
Route
PCIe
Gigabit Ethernet
SRIO
SONET
VHDL
Hardware Architecture
Logic Synthesis
Integrated Circuit Design
Cadence Virtuoso
Altera
Mixed Signal
Semiconductors
IC
Low-power Design
Physical Design
DFT
Application-Specific Integrated Circuits (ASIC)
Field-Programmable Gate Arrays (FPGA)
Planning
Testing
Photoshop
Engineering
Interiors
Retail
Churches
Application Specific Integrated Circuits Asic
Store Planning
Restaurant
Low Power Design
Custom Residential
Educational
System on a Chip Soc
Multi Family Residential
Civic
Field Programmable Gate Arrays Fpga
Application Specific Integrated Circuits
System on a Chip
Field Programmable Gate Arrays
Ben Kerr Summary
Ben Kerr, based in California, United States, is currently a Silicon Engineer at Google. Ben Kerr brings experience from previous roles at Toshiba Memory America, Inc. (TMA), Imagination Technologies, Broadcom and Texas Instruments. Ben Kerr holds a 1991 - 1995 Bachelor of Engineering in Engineering @ De Montfort University. With a robust skill set that includes Linux, ASIC, Verilog, SystemVerilog, RTL design and more. Ben Kerr has 5 emails on RocketReach.
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