Bart Bartholomew Email & Phone Number
Sr. Principal Analog Layout Engineer @ Celero Communications
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Bart Bartholomew Location
- Bethlehem, PA, US
Bart Bartholomew Work
- Sr. Principal Analog Layout Engineer @ (February 2026 - Present)
- Senior Layout Design Engineer @ (April 2025 - February 2026)
- Senior Hardware Design Engineer @ (September 2024 - December 2024)
- Senior IC Design Engineer @ (August 2021 - April 2024)
- Senior Layout Design Engineer @ (November 2020 - August 2021)
- Senior Layout Design Engineer @ (November 2019 - November 2020)
- Senior Layout Design Engineer @ (August 2018 - November 2019)
- Design Engineer @ (December 2017 - July 2018)
- IC Layout Engineer @ MultiPhy (February 2016 - June 2017)
- Design Engineer @ (May 2014 - August 2015)
- Design Engineer @ (January 2007 - December 2014)
- Design Engineer @ (January 2003 - December 2007)
- Physical Design Engineer @ (March 1997 - December 2003)
- Electro-Mechanical Technician @ Ford Electronics and Refrigeration Corp. (May 1989 - March 1997)
Bart Bartholomew Education
- Lafayette College
BS Degree (Electrical Engineering with a concentration in Mathematics)
1990-2003 - Lincoln Tech
Associate Degree (Electronics Technology)
1985-1987
Bart Bartholomew Skills
- Cadence Virtuoso
- Debugging
- System On A Chip Soc
- Perl
- RTL design
- Design Engineering
- Analog
- ASIC
- Electronics
- VLSI
- Verilog
- Design Rule Checking Drc
- Integrated Circuit Design
- Cadence
- TCL
- Circuit Design
- Integrated Circuits Ic
- Mixed Signal
- Embedded Systems
- CMOS
- Semiconductor Industry
- Application Specific Integrated Circuits Asic
- LVS
- SoC
- EDA
- Timing Closure
- DRC
- Semiconductors
- Physical Design
- Simulations
- Design
- Static Timing Analysis
- Very Large Scale Integration Vlsi
- Electrical Design
- IC
- Application Specific Integrated Circuits
- Integrated Circuits
- Design Rule Checking
- System on a Chip
- Very Large Scale Integration
Bart Bartholomew Summary
- Bart Bartholomew, based in Bethlehem, PA, US, is currently a Sr. Principal Analog Layout Engineer at Celero Communications. Bart Bartholomew brings experience from previous roles at TTM Technologies, Microsoft, Broadcom Inc. and Apple. Bart Bartholomew holds a 1990 - 2003 BS Degree in Electrical Engineering with a concentration in Mathematics @ Lafayette College. With a robust skill set that includes Cadence Virtuoso, Debugging, System On A Chip Soc, Perl, RTL design and more. Bart Bartholomew has 2 emails and 2 mobile phone numbers on RocketReach.
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