Badrinath P Email
ASIC Physical Design Engineer @ Kalatronics Semiconductors Pvt Ltd
5 free lookup(s). No credit card required.
If you need more lookups,
subscriptions start at $34 USD/month.
Badrinath P Location
- Bengaluru, KA, IN
Badrinath P Work
- ASIC Physical Design Engineer @ (November 2024 - Present)
- Physical Design Engineer @ (June 2022 - October 2024)
Badrinath P Education
- SRKR Engineering College
Bachelor of Technology - BTech (Electronics and Communications Engineering)
2018-2022
Badrinath P Skills
- Layout Versus Schematic (LVS)
- Design Rule Checking (DRC)
- Primetime
- Static Timing Analysis
- Clock Tree Synthesis
- Timing Closure
- Floorplanning
- EDA
- Physical Verification
- Physical Design
Badrinath P Summary
- Badrinath P, based in Bengaluru, KA, IN, is currently a ASIC Physical Design Engineer at Kalatronics Semiconductors Pvt Ltd. Badrinath P brings experience from previous roles at AISemiCon. Badrinath P holds a 2018 - 2022 Bachelor of Technology - BTech in Electronics and Communications Engineering @ SRKR Engineering College. With a robust skill set that includes Layout Versus Schematic (LVS), Design Rule Checking (DRC), Primetime, Static Timing Analysis, Clock Tree Synthesis and more. Badrinath P has 1 emails on RocketReach.
Looking for a different Badrinath P?
Find contact details for 700 million professionals.
Others Named Badrinath P
Top Kalatronics Semiconductors Pvt Ltd Employees
Siddula Sowjanya
Trainee Engineer
Hyderabad, IN
Karthik Kunche
Associate physical design engineer
Bengaluru, KA, IN
Ram Vallabhasetti
Associate physical design engineer
Andhra Pradesh, India
Sirisha Paluri
Associate PD Engineer
Bengaluru, KA, IN
Valipi Rajesh
Associative Design Verification Engineer
Bengaluru, KA, IN
G2 Crowd Trusted
300K+ Plugin Users
© 2026 RocketReach.co