Ayush Garg Email & Phone Number
Physical Design Engineer @ Apple
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Ayush Garg Location
- Waltham, MA, US
Ayush Garg Work
- Physical Design Engineer @ (September 2020 - Present)
- Physical Design Engineer @ (July 2013 - September 2020)
- Staff Engineer I, IC Design @ (June 2011 - June 2013)
- Co-Op Engineer @ (August 2010 - December 2010)
- Summer Intern @ (July 2008 - December 2008)
- Student Trainee @ (May 2007 - July 2007)
Ayush Garg Education
- Texas A&M University
MS (Electrical & Computer Engineering)
2009-2011 - Birla Institute of Technology and Science, Pilani
BS (Electrical)
2005-2009
Ayush Garg Skills
- DFT
- Physical Design
- Static Timing Analysis
- Timing
- Digital Electronics
- VLSI
- Verilog
- Integrated Circuit Design
- Primetime
- Timing Closure
Ayush Garg Summary
- Ayush Garg, based in Waltham, MA, US, is currently a Physical Design Engineer at Apple. Ayush Garg brings experience from previous roles at Apple, Broadcom, AMD and CSIR-CEERI. Ayush Garg holds a 2009 - 2011 MS in Electrical & Computer Engineering @ Texas A&M University. With a robust skill set that includes DFT, Physical Design, Static Timing Analysis, Timing, Digital Electronics and more. Ayush Garg has 2 emails and 3 mobile phone numbers on RocketReach.
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