Ayush Garg Location
Waltham, MA, US
Ayush Garg Work
- 2020 - now Physical Design Engineer @ Apple
- 2013 - 2020 Physical Design Engineer @ Apple
- 2011 - 2013 Staff Engineer I, IC Design @ Broadcom
- 2010 - 2010 Co-Op Engineer @ AMD
- 2008 - 2008 Summer Intern @ CSIR-CEERI
- 2007 - 2007 Student Trainee @ Bharat Dynamics Limited
Ayush Garg Education
- Texas A&M University
MS (Electrical & Computer Engineering)
2009 - 2011 - Birla Institute of Technology and Science, Pilani
BS (Electrical)
2005 - 2009
Ayush Garg Skills
- DFT
- Physical Design
- Static Timing Analysis
- Timing
- Digital Electronics
- VLSI
- Verilog
- Integrated Circuit Design
- Primetime
- Timing Closure
Ayush Garg Summary
Ayush Garg, based in Waltham, MA, US, is currently a Physical Design Engineer at Apple. Ayush Garg brings experience from previous roles at Apple, Broadcom, AMD and CSIR-CEERI. Ayush Garg holds a 2009 - 2011 MS in Electrical & Computer Engineering @ Texas A&M University. With a robust skill set that includes DFT, Physical Design, Static Timing Analysis, Timing, Digital Electronics and more. Ayush Garg has 2 emails and 3 mobile phone numbers on RocketReach.
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