Ashwin S Email
Senior Design Engineer @ AMD
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Ashwin S Location
- Austin, TX, US
Ashwin S Work
- 2019 -now Senior Design Engineer @
- 2017 -2019 Design Engineer 2 (Circuits) @
- 2015 -2016 Design Verification Intern @
- 2015 -2015 RTL Design Verification Intern @
- 2012 -2014 Embedded Software Engineer @
- 2011 -2011 Intern @
Ashwin S Education
- Texas A&M University
Master of Science (M.S.) (Computer Engineering)
2014-2016 - University of California, Santa Cruz
(VLSI Engineering)
2015-2016 - B. M. S. College of Engineering
Bachelor of Engineering (B.E.) (Electrical, Electronics and Communications Engineering)
2008-2012
Ashwin S Skills
- Verilog
- Microarchitecture
- RTL Design
- C++
- C
- Cadence Virtuoso
- Python
- Cadence Spectre
- Cadence Encounter
- Synopsys Primetime
- Functional Verification
- Xilinx ISE
- NCVerilog
- Matlab
- Embedded Systems
- Linux
- Perl
- SystemVerilog
Ashwin S Summary
- Ashwin S, based in Austin, TX, US, is currently a Senior Design Engineer at AMD. Ashwin S brings experience from previous roles at AMD, Broadcom, Intel Corporation and Robert Bosch Engineering and Business Solutions. Ashwin S holds a 2014 - 2016 Master of Science (M.S.) in Computer Engineering @ Texas A&M University. With a robust skill set that includes Verilog, Microarchitecture, RTL Design, C++, C and more. Ashwin S has 2 emails on RocketReach.
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