Ashutosh Verma Email
Principal Design Engineer @ Samsung
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Ashutosh Verma Location
- California, United States
Ashutosh Verma Work
- Principal Design Engineer @ (August 2015 - Present)
- Sr Staff Analog Design Engineer @ (February 2009 - July 2015)
- Intern @ (June 2005 - September 2005)
- System Designer @ (March 2000 - August 2002)
- Software Engineer @ (June 1999 - February 2000)
Ashutosh Verma Education
- University of California, Los Angeles
Doctor of Philosophy (Electrical Engineering)
2004-2009 - University of California, Los Angeles
Master of Science (Electrical Engineering)
2002-2004 - Indian Institute of Technology, Delhi
(Electrical Engineering)
1995-1999 - St Aloysius High School
Ashutosh Verma Skills
- FPGA
- Verilog
- Digital Signal Processors
- CMOS
- Cadence Virtuoso
- Simulations
- Low Power Design
- VLSI
- EDA
- ASIC
- Analog Circuit Design
- IC
- Debugging
- SoC
- Circuit Design
- Embedded Systems
- Semiconductors
- Analog
- Mixed Signal
- Integrated Circuit Design
- Product Marketing
- Writing
- Git
- Markdown
- Illustrator
- Content Management
- Ruby
- HTML 5
- User Experience
- HTML + CSS
- Web Applications
- Photoshop
- Start Ups
- Usability Testing
- Couchbase
- Agile Methodologies
- Software Documentation
- Strategy
- HTML
- Mobile Applications
- Java
- Unix Shell Scripting
- Product Management
- JavaScript
- Ruby on Rails
- CSS
- SaaS
- Project Management
- Unix
- Mobile Devices
- Cloud Computing
- MySQL
Ashutosh Verma Summary
- Ashutosh Verma, based in California, United States, is currently a Principal Design Engineer at Samsung. Ashutosh Verma brings experience from previous roles at Marvell Semiconductor, Clariphy Commmunications, Biomorphic VLSI Inc and Mentor Graphics. Ashutosh Verma holds a 2004 - 2009 Doctor of Philosophy in Electrical Engineering @ University of California, Los Angeles. With a robust skill set that includes FPGA, Verilog, Digital Signal Processors, CMOS, Cadence Virtuoso and more. Ashutosh Verma has 2 emails on RocketReach.
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