Ashutosh Garg's Location

Folsom, California, United States

Ashutosh Garg's Work

Ashutosh Garg's Education

  • Stanford University

    MS (Electrical Engineering)

    2007 - 2008
  • California State University-Sacramento

    Master of Business Administration (MBA) (Finance, General)

    2010 - 2012
  • California State University, Fresno

    B.S. (Electrical Engineer)

    2004 - 2007

Ashutosh Garg's Skills

  • Hardware Architecture
  • Logic Design
  • Computer Architecture
  • C
  • Debugging
  • Functional Verification
  • Perl
  • RTL design
  • Matlab
  • Intel

Ashutosh Garg's Summary

Ashutosh Garg, based in Folsom, California, United States, is currently a Senior Member Of Technical Staff at AMD, bringing experience from previous roles at Intel Corporation. Ashutosh Garg holds a 2007 - 2008 MS in Electrical Engineering @ Stanford University. With a robust skill set that includes Hardware Architecture, Logic Design, Computer Architecture, C, Debugging and more, Ashutosh Garg contributes valuable insights to the industry. Ashutosh Garg has 3 emails and 1 mobile phone number on RocketReach.

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