Ashutosh Garg Email & Phone Number
Principal Member of Technical Staff @ AMD
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Ashutosh Garg Location
- Folsom, CA, US
Ashutosh Garg Work
- 2024 -now Principal Member of Technical Staff @
- 2020 -2024 Senior Member Of Technical Staff @
- 2017 -2020 Microarchitect @
- 2013 -2017 Technical Lead @
- 2008 -2013 Senior Hardware Design Engineer @
- 2008 -2008 Graduate Technical Intern @
- 2008 -2008 Teaching Assistant @
Ashutosh Garg Education
- California State University-Sacramento 2010-2012
- Stanford University 2007-2008
- California State University, Fresno 2004-2007
Ashutosh Garg Skills
- Hardware Architecture
- Logic Design
- Computer Architecture
- C
- Debugging
- Functional Verification
- Perl
- RTL design
- Matlab
- Intel
- ASIC
- VLSI
- Verilog
- Integrated Circuit Design
- Circuit Design
- Embedded Systems
- Application Specific Integrated Circuits Asic
- FPGA
- SoC
- VHDL
- EDA
- C++
- SystemVerilog
- Semiconductors
- Design
- Simulations
- Very Large Scale Integration Vlsi
- Microprocessors
- Computer Graphics
- Floating Point Arithmatic
- 3D graphics
- ModelSim
- Machine Learning
- Application Specific Integrated Circuits
- Very Large Scale Integration
Ashutosh Garg Summary
- Ashutosh Garg, based in Folsom, CA, US, is currently a Principal Member of Technical Staff at AMD. Ashutosh Garg brings experience from previous roles at AMD and Intel Corporation. Ashutosh Garg holds a 2010 - 2012 California State University-Sacramento. With a robust skill set that includes Hardware Architecture, Logic Design, Computer Architecture, C, Debugging and more. Ashutosh Garg has 3 emails and 1 mobile phone numbers on RocketReach.
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