Arvind Raghavan Location
Milpitas, CA, US
Arvind Raghavan Work
- 2024 - now Senior RTL Designer @ ASIC North
- 2019 - 2024 Principal Engineer @ Infinera
- 2011 - 2019 Senior Program Manager @ Infinera
- 2010 - 2011 Principal Engineer @ Infinera
- 2006 - 2010 Member of Technical Staff, ASIC @ Infinera
- 2004 - 2006 Senior MTS - Design @ Vitesse Semiconductor is now Microsemi
- 2000 - 2003 Member of Technical Staff @ Vitesse Semiconductor is now Microsemi
Arvind Raghavan Education
- Indian Institute of Technology, Madras
B.Tech (Electronics and Communication Engineering)
- Indian Institute of Technology, Madras
MS (Electrical Engineering)
- University of Maryland
- UCLA Anderson School of Management
Arvind Raghavan Skills
- Program Management
- Optical Communications
- Application-Specific Integrated Circuits (ASIC)
- ASIC
- Verilog
- FPGA
- SystemVerilog
- Semiconductors
- Simulations
- Synopsys tools
Arvind Raghavan Summary
Arvind Raghavan, based in Milpitas, CA, US, is currently a Senior RTL Designer at ASIC North. Arvind Raghavan brings experience from previous roles at Infinera. Arvind Raghavan holds a B.Tech in Electronics and Communication Engineering @ Indian Institute of Technology, Madras. With a robust skill set that includes Program Management, Optical Communications, Application-Specific Integrated Circuits (ASIC), ASIC, Verilog and more. Arvind Raghavan has 2 emails and 1 mobile phone numbers on RocketReach.
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