Arjun Ananth Email
AMS Design Verification Engineer @ Fraunhofer IPMS
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Arjun Ananth Location
- Dresden, SN, DE
Arjun Ananth Work
- AMS Design Verification Engineer @ (July 2025 - Present)
- Master Thesis - Mixed Signal IC Design @ (November 2024 - June 2025)
- WHK - Mixed Signal IC Design @ (June 2024 - November 2024)
- WHK - Analog IC Design and Validation @ (January 2025 - June 2025)
- WHK - Digital Signal Processing @ (October 2023 - December 2024)
- WHK - Circuit Design and Validation for Solid State Transducers @ (October 2023 - March 2024)
- Research Assistant (WHK) @ (March 2023 - August 2023)
- Hardware Engineer - Power Electronics @ (March 2022 - September 2022)
- Hardware Design Intern @ (September 2021 - February 2022)
Arjun Ananth Education
- Technische Universität Dresden
Master of Science (Nanoelectronic Systems)
2022-2025 - PSG College of Technology
Bachelor of Engineering - BE (Instrumentation and Control Systems Engineering)
2018-2022
Arjun Ananth Summary
- Arjun Ananth, based in Dresden, SN, DE, is currently a AMS Design Verification Engineer at Fraunhofer Institute for Photonic Microsystems IPMS. Arjun Ananth brings experience from previous roles at Fraunhofer Institute for Photonic Microsystems IPMS, Bosch Sensortec GmbH and Technische Universität Dresden. Arjun Ananth holds a 2022 - 2025 Master of Science in Nanoelectronic Systems @ Technische Universität Dresden. Arjun Ananth has 2 emails on RocketReach.
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