Aravind Bhat Email & Phone Number
Senior Verification Engineer @ Intel Corporation
5 free lookup(s). No credit card required.
If you need more lookups,
subscriptions start at $34 USD/month.
Aravind Bhat Location
- Bengaluru, KA, IN
Aravind Bhat Work
- Senior Verification Engineer @ (July 2014 - Present)
- Project Lead @ (July 2010 - June 2014)
- Asic Design Engineer @ (April 2008 - July 2010)
- Module Lead @ (April 2007 - April 2008)
- MTS @ (April 2006 - March 2007)
- Project Engineer @ (April 2004 - March 2006)
Aravind Bhat Education
- Goa University
B.E (Electronics & Telecommunication)
1997-2001 - deepvihar high school, goa
- v3 logic
Aravind Bhat Skills
- RTL design
- Embedded Systems
- ASIC
- FPGA
- VLSI
- Verilog
- VHDL
- Perl
- C
- Debugging
- System Verilog
- Functional Verification
- Soc Verification
Aravind Bhat Summary
- Aravind Bhat, based in Bengaluru, KA, IN, is currently a Senior Verification Engineer at Intel Corporation. Aravind Bhat brings experience from previous roles at L&T Infotech, AMD and Persistent Systems. Aravind Bhat holds a 1997 - 2001 B.E in Electronics & Telecommunication @ Goa University. With a robust skill set that includes RTL design, Embedded Systems, ASIC, FPGA, VLSI and more. Aravind Bhat has 4 emails and 1 mobile phone numbers on RocketReach.
Looking for a different Aravind Bhat?
Find contact details for 700 million professionals.
Top Intel Corporation Employees
Mark Castleman
Managing Director, Intel AI Cloud and BMG
New York, NY, US
Lip-Bu Tan
Chief Executive Officer
San Jose, CA, US
Sally Piao
Vice President and General Manager
Santa Clara, CA, US
John Zucker
Vice President of Global Business Development and Marketing
Santa Clara, CA, US
Xiaoran Tong
Vice President, Corp Strategy
Santa Clara, CA, US
G2 Crowd Trusted
300K+ Plugin Users
© 2026 RocketReach.co