Arash Jafari Email
FPGA Design Engineer @ Thales Defense & Security, Inc.
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Arash Jafari Location
- Zurich, Switzerland
Arash Jafari Work
- FPGA Design Engineer @ (April 2025 - Present)
- DSP Design Engineer @ (December 2021 - July 2025)
- FPGA Design Engineer @ (June 2018 - October 2021)
- RF System Engineer @ (June 2017 - June 2018)
Arash Jafari Education
- Technische Universität Wien 2013-2019
Arash Jafari Skills
- DAC
- Converter
- Radio Design
- Analog-to-Digital Converters (ADC)
- FPGA Design
- Radio Frequency (RF)
- Wireless Communications Systems
- Verilog
- VHDL
- Matlab
- Assembly Language
- Python (Programming Language)
- C++
- C
- HFSS
- Logic Gates
- Analog, Digital and mixed signal exprience
- SDR
- 8051 Microcontroller
- AWR Microwave Office
Arash Jafari Summary
- Arash Jafari, based in Zurich, Switzerland, is currently a FPGA Design Engineer at Thales Defense & Security, Inc.. Arash Jafari brings experience from previous roles at Bradford Space, Atos IT Solutions and Services A/S and Siemens Convergence Creators GmbH & Co. KG. Arash Jafari holds a 2013 - 2019 Technische Universität Wien. With a robust skill set that includes DAC, Converter, Radio Design, Analog-to-Digital Converters (ADC), FPGA Design and more. Arash Jafari has 1 emails on RocketReach.
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