Anthony Weerasinghe's Location
Santa Clara, CA, US
Anthony Weerasinghe's Work
- FPGA Engineer @ Meta
- FPGA Engineer @ Zoox
- Senior Design Engineer @ Altera (Intel Programmable Solutions Group)
- Wireless Modem Verification Engineer @ Qualcomm
- Physical Design Engineer @ Apple
- FPGA Design Intern @ MIT Lincoln Laboratory
- SRAM Design Intern @ Intel Corporation
- FPGA Design Intern @ NASA Jet Propulsion Laboratory
- Post-Silicon Validation Intern @ Qualcomm
- Post-Silicon Validation Intern @ Qualcomm
Anthony Weerasinghe's Education
- The University of Texas at Austin
Master of Science (Computer Engineering)
2009 - 2011 - Harvey Mudd College
Bachelor of Science (Engineering)
2004 - 2008
Anthony Weerasinghe's Skills
- Verilog
- VHDL
- Perl
- Matlab
- C++ Language
- System Verilog
- OVM
- ARM Assembly
- Synopsis Design Compiler
- Xilinx ISE
Anthony Weerasinghe's Summary
Anthony Weerasinghe, based in Santa Clara, CA, US, is currently a FPGA Engineer at Meta, bringing experience from previous roles at Zoox, Altera (Intel Programmable Solutions Group), Qualcomm and Apple. Anthony Weerasinghe holds a 2009 - 2011 Master of Science in Computer Engineering @ The University of Texas at Austin. With a robust skill set that includes Verilog, VHDL, Perl, Matlab, C++ Language and more, Anthony Weerasinghe contributes valuable insights to the industry. Anthony Weerasinghe has 2 emails on RocketReach.
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