Andrea Pagliano's Location
Lombardy, Italy
Andrea Pagliano's Work
- Senior Firmware Engineer @ Paytec - Payment Technologies
- HW and FW Engineer of SoC for FPGA and ASIC @ SIAE MICROELETTRONICA
- HW and FW Engineer @ teleco S.p.A.
- HW and FW engineer @ Italtel
Andrea Pagliano's Education
- 1985 - 1988
Andrea Pagliano's Skills
- Telecomunicazioni
- IP
- Ethernet
- Wireless
- Sistemi embedded
- Linux
- C
- SDH
- TCP/IP
- VHDL
Andrea Pagliano's Summary
Andrea Pagliano, based in Lombardy, Italy, is currently a Senior Firmware Engineer at Paytec - Payment Technologies, bringing experience from previous roles at SIAE Microelettronica, teleco S.p.A. and Italtel. Andrea Pagliano holds a 1985 - 1988 . With a robust skill set that includes Telecomunicazioni, IP, Ethernet, Wireless, Sistemi embedded and more, Andrea Pagliano contributes valuable insights to the industry. Andrea Pagliano has 2 emails on RocketReach.
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