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Amr Zaky Location
California, United States
Amr Zaky Work
Senior Principal Performance Architect @ (May 2026 - Present)
Adjunct Professor of Computer Science and Engineering @ (January 1998 - Present)
SW and HW Performance Architect -Core OS @ (April 2021 - May 2026)
President @ Amr Zaky Consulting (January 2014 - April 2021)
SoC Architect @ (June 2014 - October 2019)
Senior Principal Design Engineer @ (February 2006 - December 2013)
Senior Staff CPU Architect @ (May 2003 - January 2006)
CPU Architect @ (January 2002 - January 2003)
Senior CPU Architect @ ARC Cores (January 2000 - January 2002)
Manager Performance Arch. @ (January 1998 - January 2000)
Senior Platform Architect @ Silicon Graphics, Inc. (January 1996 - January 1998)
Amr Zaky Education
The Ohio State University
Ph.D. (Computer Science)
Alexandria University
B.Sc (M.Sc., Computer Science)
Amr Zaky Skills
ARM
ARM Architecture
ASIC
Algorithms
Application Specific CPU Design
Application-Specific Integrated Circuits (ASIC)
Architecture Documentation
Automotive SoC
C
C (Programming Language)
C++
Cache Coherency
Computer Architecture
Cycle-accurate Modeling
Digital Signal Processors
Embedded Software
Embedded Systems
Firmware
High Level Microarchitecture
High Level Synthesis
Interconnect Design
Intersystems Cache
Logic Design
Low-power Design
Memory Controller Microarchitecture
Memory Usage
Microarchitecture
Microprocessors
Microsoft Excel
Patent research
Performance Bottleneck Identification
Performance Counter Architecture
Performance Engineering
Performance Modeling
Performance Tracer Microarchitecture
Power Management
Processors
Python
RTL Design
SW-HW Interaction
Semiconductors
Sensor SoCs
SoC
System Architecture
System C
System on a Chip (SoC)
Task Assessment
VLSI
Verilog
Visio
Workload Analysis
IC
Simulations
FPGA
Debugging
MIPS
Shell Scripting
EDA
TCL
VHDL
SystemVerilog
Hardware Architecture
Static Timing Analysis
Integrated Circuit Design
Device Drivers
CVS
VBA
Microarchitectue performance analysis
Carbon Model Studio
Perl
SystemC
Memory
Teaching
Strategy
Customer Service
Cycle Accurate Modeling
Science
Low Power Design
System on a Chip Soc
Application Specific Integrated Circuits Asic
Sw Hw Interaction
Application Specific Integrated Circuits
System on a Chip
C (Programming Language
Amr Zaky Summary
Amr Zaky, based in California, United States, is currently a Senior Principal Performance Architect at Neurophos. Amr Zaky brings experience from previous roles at Santa Clara University, Apple, Amr Zaky Consulting and TDK InvenSense. Amr Zaky holds a Ph.D. in Computer Science @ The Ohio State University. With a robust skill set that includes ARM, ARM Architecture, ASIC, Algorithms, Application Specific CPU Design and more. Amr Zaky has 6 emails and 7 mobile phone numbers on RocketReach.
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