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Alexander Gert Location
Saratoga, CA, US
Alexander Gert Work
Principal Engineer @ (November 2019 - Present)
Cpu Emulation Lead @ (January 2016 - November 2019)
Distinguished Engineer @ (April 2014 - January 2016)
Staff Engineer @
Senior Principal Engineer @ (April 2008 - May 2009)
Senior Engineer and Project Lead @ (March 2006 - April 2008)
Member of Technical Staff, Hardware @ (June 2003 - March 2006)
Design Engineer @ Garuda Networks (December 2000 - June 2003)
Design Engineer @ Elbrus McSt (January 1997 - October 2000)
Alexander Gert Education
Moscow Institute of Physics and Technology (State University) (MIPT)
Masters (Computer Engineering)
1998-2000
Moscow Institute of Physics and Technology (State University) (MIPT)
Bachelors (Physics)
1994-1998
Alexander Gert Skills
Microprocessors
SoC
Debugging
Functional Verification
Hardware Architecture
ASIC
Verilog
RTL design
SystemVerilog
Embedded Systems
Computer Architecture
Hardware
Emulation
Processors
X86
High Performance Computing
Semiconductors
VLSI
Embedded Software
ARM
TCL
Operating Systems
Software Design
EDA
FPGA
System on a Chip (SoC)
Perl
C
Alexander Gert Summary
Alexander Gert, based in Saratoga, CA, US, is currently a Principal Engineer at Ventana Micro Systems. Alexander Gert brings experience from previous roles at Apple, Appliedmicro and Veloce Technologies PVT LTD. Alexander Gert holds a 1998 - 2000 Masters in Computer Engineering @ Moscow Institute of Physics and Technology (State University) (MIPT). With a robust skill set that includes Microprocessors, SoC, Debugging, Functional Verification, Hardware Architecture and more. Alexander Gert has 4 emails and 2 mobile phone numbers on RocketReach.
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