Alberto Realo Email & Phone Number
Senior FPGA Engineer @ ATOMOS
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Alberto Realo Location
- Melbourne, VIC, AU
Alberto Realo Work
- Senior FPGA Engineer @ (October 2019 - Present)
- FPGA engineer @ (July 2017 - September 2019)
- FPGA Engineer @ ATOMOS (February 2014 - April 2017)
- Digital IC Design Engineer @ Panasonic Semiconductor Asia (August 2011 - December 2013)
- ASIC Engineer @ (July 2004 - July 2011)
Alberto Realo Education
- University of the Philippines
BS/MS (Electrical engineering)
1997-2004 - St. Joseph's School
Alberto Realo Skills
- AXI
- ASIC
- RTL design
- Verilog
- VCS
- TCL
- Assembly
- Shell Scripting
- Digital Design
- Hardware Design
- Debugging
- Microcontrollers
- RTL coding
- Static Timing Analysis
- SoC
- Formal Verification
- DFT
- SystemVerilog
- Digital IC Design
- AMBA AHB
- FPGA
- Low-power Design
- I2C
- EDA
- Firmware
- Signal Integrity
- Functional Verification
- Cadence Virtuoso
- ARM
- Mixed Signal
- VHDL
- SATA
- IC
- Processors
- SystemC
- Logic Synthesis
- Integrated Circuit Design
- Hardware Architecture
- Project Management
- Embedded Software
- Systems Engineering
- Low Power Design
- Digital Marketing
- Hunter
- Hardware
Alberto Realo Summary
- Alberto Realo, based in Melbourne, VIC, AU, is currently a Senior FPGA Engineer at ATOMOS. Alberto Realo brings experience from previous roles at Bluefish444, ATOMOS, Panasonic Semiconductor Asia and BiTMICRO Networks. Alberto Realo holds a 1997 - 2004 BS/MS in Electrical engineering @ University of the Philippines. With a robust skill set that includes AXI, ASIC, RTL design, Verilog, VCS and more. Alberto Realo has 2 emails and 1 mobile phone numbers on RocketReach.
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