Ajay Bellam's Location
Bengaluru, Karnataka, India
Ajay Bellam's Work
- SoC Design Engineer @ Intel Corporation
- Design Engineer 2 @ Asarva Chips & Technologies Pvt Ltd
- System Design Engineer @ Sirish Telematics Services Ltd.
Ajay Bellam's Education
- Sandeepani School of VLSI and Embedded System Design
Trainee Engineer (VLSI System Engineering and Verification)
2013 - 2013 - Visvesvaraya Technological University
M.Tech (VLSI Design & Embedded Systems)
2010 - 2012 - Visvesvaraya Technological University
B.E (Electronics & Communication)
2006 - 2010
- St., Francis High School, Koramangala, Bangalore
S.S.L.C
2001 - 2004
Ajay Bellam's Skills
- VLSI
- SoC
- Logic Synthesis
- Static Timing Analysis
- FPGA
- DFT
- Standard Cell Development
- Cadence Encounter Digital Implementation
- Cadence Virtuoso
- Virtuoso Layout Editor
Ajay Bellam's Summary
Ajay Bellam, based in Bengaluru, Karnataka, India, is currently a SoC Design Engineer at Intel Corporation, bringing experience from previous roles at Asarva Chips and Technologies Pvt Ltd., and Sirish Telematics Services Ltd.. Ajay Bellam holds a 2013 - 2013 Trainee Engineer in VLSI System Engineering and Verification @ Sandeepani School of VLSI and Embedded System Design. With a robust skill set that includes VLSI, SoC, Logic Synthesis, Static Timing Analysis, FPGA and more, Ajay Bellam contributes valuable insights to the industry. Ajay Bellam has 1 email on RocketReach.
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