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Aditya Rathi Location
Austin, TX, US
Aditya Rathi Work
Senior Principal Design Engineer @ (June 2021 - Present)
Intern @ Intel Corporation - Infrastructure and Processor Division (IPD) Architecture Tea (January 2004 - December 2004)
Staff Design Engineer @ (June 2013 - June 2017)
Senior Design Engineer @ (May 2012 - June 2013)
Technical Lead @ National Instruments (March 2011 - May 2012)
Staff Hardware Engineer @ National Instruments (July 2008 - March 2011)
Hardware Engineer @ (April 2005 - February 2008)
Research Assistant @ (January 2003 - March 2003)
Aditya Rathi Education
Arizona State University
Masters of Science (Electrical Engineering)
2003-2005
University College of Engineering - Osmania University
BE (Electronics and Communication Engineering)
1999-2003
Aditya Rathi Skills
Digital Design
SoC
FPGA
Embedded Systems
PCB design
VHDL
Verilog
Computer Architecture
Microprocessors
Xilinx
Hardware Architecture
Firmware
Field-Programmable Gate Arrays (FPGA)
Microcontrollers
Design
SystemVerilog
Python
Perl
Shell Scripting
Technical Leadership
Mentoring
System on a Chip (SoC)
FPGA prototyping
ARM Architecture
IP development
Bus Protocols
AMBA
GIT
SVN
Continuous Integration and Continuous Delivery (CI/CD)
Jenkins
Techno management
Protocol
Automotive
Labview
Platform
Net
Aditya Rathi Summary
Aditya Rathi, based in Austin, TX, US, is currently a Senior Principal Design Engineer at Arm. Aditya Rathi brings experience from previous roles at Intel Corporation - Infrastructure and Processor Division (IPD) Architecture Tea, ARM and National Instruments. Aditya Rathi holds a 2003 - 2005 Masters of Science in Electrical Engineering @ Arizona State University. With a robust skill set that includes Digital Design, SoC, FPGA, Embedded Systems, PCB design and more. Aditya Rathi has 4 emails and 1 mobile phone numbers on RocketReach.
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