Abhijeeth Bhat's Location

Santa Clara, CA, US

Abhijeeth Bhat's Work

Abhijeeth Bhat's Education

  • University of Minnesota-Twin Cities

    Master’s Degree (Digital VLSI/Computer Architecture)

    2015 - 2017
  • R. V. College of Engineering, Bangalore

    Bachelor of Engineering (B.E.) (Electronics and Instrumentation)

    2008 - 2012
  • Sri Bhagawan Mahaveer Jain College

    High School Diploma (Computer Science)

    2006 - 2008

Abhijeeth Bhat's Skills

  • Cadence Virtuoso
  • Calibre Verification Tools Lvs
  • PLC Ladder Logic
  • Synopsys Tetramax
  • C
  • SCADA
  • SPICE
  • Perl
  • Net
  • Matlab

Abhijeeth Bhat's Summary

Abhijeeth Bhat, based in Santa Clara, CA, US, is currently a Physical Design Engineer at Apple, bringing experience from previous roles at Intel Corporation and Schneider Electric. Abhijeeth Bhat holds a 2015 - 2017 Master’s Degree in Digital VLSI/Computer Architecture @ University of Minnesota-Twin Cities. With a robust skill set that includes Cadence Virtuoso, Calibre Verification Tools Lvs, PLC Ladder Logic, Synopsys Tetramax, C and more, Abhijeeth Bhat contributes valuable insights to the industry. Abhijeeth Bhat has 2 emails and 1 mobile phone number on RocketReach.

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