Tomasz Borejko's Location
Warsaw, Mazowieckie, Poland
Tomasz Borejko's Work
- Assistant Professor @ Warsaw University of Technology
- Principal RFIC Design Engineer at ASIC Design and Education Center @ Warsaw University of Technology
- Expert and Reviewer @ European Commission
- Co-Founder and CEO, Lead RFIC Design Engineer, EDA and CAD and PDK Manager @ ChipCraft Sp. z o.o.
- Analog Lead IC Design Engineer @ Cadence Design Systems
- Deputy Head of Analog Projects Office, EDA and CAD and PDK Manager, Analog Senior IC design engineer @ Evatronix SA
- Analog and RF Senior IC Design Engineer @ Inside Secure
- Analog and RF IC Design Engineer @ Inside Secure
- Analog RF and Mixed-Signal IC Design Engineer @ Inside Secure
- System Support Engineer @ Selmar Marek Przezwański
Tomasz Borejko's Education
- Warsaw University of Technology
Doctor of Philosophy (Ph.D.) (Electrical, Electronics and Communications Engineering)
2007 - 2013 - Warsaw University of Technology
Master of Science (MSc) (Electrical, Electronics and Communications Engineering)
1998 - 2003
Tomasz Borejko's Skills
- Entrepreneurship
- Semiconductor Industry
- Operations Management
- Project Management
- System Architecture
- SoC
- IC Fabless
- RFIC
- VLSI
- PDK Development
Tomasz Borejko's Summary
Tomasz Borejko, based in Warsaw, Mazowieckie, Poland, is currently a Assistant Professor at Warsaw University of Technology, bringing experience from previous roles at Warsaw University of Technology, European Commission, ChipCraft Sp. z o.o. and Cadence Design Systems. Tomasz Borejko holds a 2007 - 2013 Doctor of Philosophy (Ph.D.) in Electrical, Electronics and Communications Engineering @ Warsaw University of Technology. With a robust skill set that includes Entrepreneurship, Semiconductor Industry, Operations Management, Project Management, System Architecture and more, Tomasz Borejko contributes valuable insights to the industry. Tomasz Borejko has 1 email on RocketReach.
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