Ashutosh Rane's Location
Phoenix, AZ, US
Ashutosh Rane's Work
- Sr. IP Logic Design Engineer @ Intel Corporation
- IP Logic Design Engineer @ Intel Corporation
- Component Design Engineer @ Intel Corporation
- Design Engineer @ DCM Technologies
Ashutosh Rane's Education
- COEP Technological University
Bachelor of Engineering (B.E.) (Electrical, Electronics and Communications Engineering)
1994 - 1998
Ashutosh Rane's Skills
- VLSI
- Static Timing Analysis
- SoC
- ASIC
- RTL design
- Functional Verification
- Verilog
- PowerPoint
- Digital Signal
- Product Development
Ashutosh Rane's Summary
Ashutosh Rane, based in Phoenix, AZ, US, is currently a Sr. IP Logic Design Engineer at Intel Corporation, bringing experience from previous roles at Intel Corporation, Intel and DCM Technologies. Ashutosh Rane holds a 1994 - 1998 Bachelor of Engineering (B.E.) in Electrical, Electronics and Communications Engineering @ COEP Technological University. With a robust skill set that includes VLSI, Static Timing Analysis, SoC, ASIC, RTL design and more, Ashutosh Rane contributes valuable insights to the industry. Ashutosh Rane has 3 emails on RocketReach.
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