Location
San Francisco, California, United States
Work
- Senior Director of Engineering @ Microsemi Corporation
- Senior Verification Manager @ Actel
- Senior Engineering Program Manager @ Actel
- Senior Engineer @ Gatefield Corp
- Consultant @ Fortuna Technologies
- Senior Member Technical Staff @ Cadence Design Systems
- Senior Engineer @ IDM
Education
- Pepperdine University
Master of Business Administration
2007 - 2008 - Stanford University2004 - 2005
- University of Mysore1985 - 1989
Skills
- VLSI
- ASIC
- Customer Service
- SoC
- Verilog
- IC
- RTL design
- Debugging
- EDA
- Leadership
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